New IBM Tech Takes Chips to Another Dimension

IBM on Thursday announced a method of connecting processors inside of products ranging from cell phones to PCs to supercomputers.

This breakthrough — dubbed “through-silicon vias” — allows for a move away from horizontal 2-D chip layouts to 3-D chip stacking, in which chips and other components that usually sit side-by-side on a silicon wafer are stacked on top of one another.

The technology should extend battery life in wireless devices and increase speed data transfers between a computer’s processor and memory chips, the company said.

The manufacturing technique developed by IBM eliminates the need for metal wires currently used to connect 2-D chips together, instead using through-silicon vais to create vertical connections within the silicon wafer.

These connections, which are etched in the silicon and filled with metal, allow the stacking of multiple chips. The result is that greater amounts of information can be be passed between the chips.

Leaps and Bounds

IBM’s advance paves the way for 3-D chips that will extend Moore’s Law beyond its expected limits, said Lisa Su, vice president of IBM’s Semiconductor Research and Development Center. “This allows us to move 3-D chips from the ‘lab to the fab’ across a range of applications,” she said.

Moore’s Law is the theory that the number of transistors on an integrated circuit for minimum component cost doubles every 24 months.

Coming Soon

Samples of the new chips will go out to customers in the second half of 2007 and reach full production in 2008. The first users will be wireless LAN and cellular communications product manufacturers, according to the company.

IBM plans to apply the through-silicon-vias method to its microprocessors, stacking its Power series server chips and Blue Gene supercomputer chips on top of memory storage in order to increased performance.

Using the new technique, IBM claims to have shortened the distance data on the chip needs to travel by 1,000 times. The technology allows for the addition of up to 100 times more channels, or pathways, for that information to flow compared to 2-D chips.

Reducing Space, Saving Money

The new design can provide many benefits to device makers and users, including reducing overall costs. The 3-D chips could also help with the problem of power and heat dissipation.

“Clearly, anyone using high tech products would be interested in this,” Enderle told TechNewsWorld. “Smaller devices allow for lower costs and more robust solution. When you free up space you can lower costs all around.”

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